Draft:Meta Time Card
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 Example of a time synchronization card using GNSS and atomic clock technology | |
| Manufacturer | Meta Platforms |
|---|---|
| Introduced | 2021 |
| Type | Time synchronization card |
The Time Card is an open-source reference design for precision timing peripherals developed by the Open Compute Project Time Appliances Project (OCP-TAP) as part of Meta Platforms’ infrastructure hardware for network time synchronization in data centers and distributed computing environments. The card is designed as a PCI Express device that provides accurate time via GNSS and a high stability oscillator, such as an atomic clock. Time Card drivers and protocol stacks are open-source, and the publicly available hardware specification consists of commercial-off-the-shelf components.[1] A Time Card can be integrated with servers and networking peripherals to provide time synchronization service to local networks and data centers. Proprietary derivatives of the Time Card reference design are sold commercially.[2]
Description
[edit]The Time Card is an open-source architecture for networked time appliances featuring a functional hardware and software reference design.
Form Factor
[edit]The reference design for the Time Card uses a single-slot standard PCI Express add-in card form factor. The oscillator and GNSS receiver are mounted to the card as "daughter boards" affixed to the main board.
The reference design supports PCIe x1 (18 pins) generation 1.0 or above on a x4 form-factor and has no bespoke active or passive thermal management hardware.
Key Components
[edit]GNSS Receiver
[edit]A GNSS receiver is required for the Time Card to obtain time signals from GNSS satellites. The GNSS receiver module typically features an SMA connector for an attached antenna, the receiver chip itself, a pulse-per-second signal output, and a time-of-day output.
The reference design features a u-blox RCB-F9T timing board.
Clock
[edit]The Time Card uses a high stability oscillator to maintain the time between GNSS signals and across GNSS signal outages. The accuracy and stability of the Time Card depends on the oscillator used. The architecture supports Chip-scale atomic clocks, OCXOs, TCXOs, and others.
The reference design features a Microchip MAC-SA5X atomic clock.
FPGA
[edit]An FPGA serves as the bridge between the GNSS receiver and the clock to keep the oscillator synchronized to the GNSS time via a phase-locked loop. The FPGA also manages input signals, output signals, and communication to the host computer over PCIe. Implementation details of the Time Card software architecture is largely determined by the FPGA used.
The reference design features a
Software/Firmware
[edit]FPGA Firmware
[edit]The FPGA firmware is available as a binary-only (bitstream) created specifically for the Time Card by NetTimeLogic Gmbh, or as a combination of open-source IP cores as VHDL source code.
Control Center
[edit]Time Card telemetry, configuration, and controls can be viewed or modified by the Control Center software application via command-line interface or graphical user interface.
Development and collaboration
[edit]The Time Card was introduced by Meta (formerly Facebook) as part of an initiative to build a scalable and accurate timing solution that could be deployed within its global data center infrastructure. It was developed in conjunction with the Open Compute Project (OCP) Time Appliance Project, an effort to open-source the hardware and software required for precision timing appliances.[3] The card integrates a miniaturized atomic clock and Global Navigation Satellite System (GNSS) receiver, enabling servers to perform high-accuracy time synchronization independent of network-dependent time sources.[3] The Time Card is central to the related Open Time Server reference architecture.
Meta’s work on timing infrastructure began in 2021 with internal enhancements to its data centers’ time distribution systems, transitioning from traditional Network Time Protocol (NTP) architectures to higher-precision solutions for applications that require microsecond-level accuracy.[4] As part of this broader effort, Meta collaborated with hardware vendors such as Orolia to develop cards based on Meta’s initial Time Card design including Orolia’s Atomic Reference Time (ART) cards which incorporate rubidium oscillator technology aligned with the open-source timing specifications published by the OCP project.[3]
At the 2022 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS), the OCP project published a functional reference design package incorporating the Time Card with a network interface controller and Precision Time Protocol (PTP) support.[5]
Uses
[edit]The Time Card and its derivatives are used to synchronize time across servers in data center environments with precision that supports both Network Time Protocol (NTP) and Precision Time Protocol (PTP) implementations. Meta has adopted these cards to reduce synchronization error and achieve tighter timing accuracy across its infrastructure, often targeting timing stability within nanoseconds or microseconds.[6]
Industry context
[edit]At industry events such as the Open Compute Project Regional Summit in Prague in 2023, time cards incorporating atomic clocks and other high-precision timing technologies have been showcased alongside related products. These devices represent a broader trend toward hardware-based time synchronization solutions as an alternative to traditional software-based timing approaches, particularly for large-scale distributed computing and networked storage systems.[7]
Research
[edit]- (2023) Exploring Wireless Clock Synchronization with OCP-TAP Time Cards and RTL-SDRs[8]
- (2024) Timing, Communications, and Ranging SDR (TCR-SDR) for IoT Wireless Synchronization[9]
- (2025) Low-Cost PTP Grandmaster Clock Utilizing the BeagleBone Black Single Board Computer [10][11]
Standardization
[edit]The ongoing IEEE Project Authorization Request P3335 "Standard for Architecture and Interfaces for Time Card" [12] defines the generic architecture and interfaces of a time card system, which constitutes a traceable source of time-of-day to heterogeneous systems that distribute and/or use that time. Additionally, this standard defines figures of merit that univocally characterize the relevant performance of the Time Card. The Time Card provides a traceable time-of-day for systems directly attached to it, as well as networked distributed systems. Such systems include, but are not limited to, servers hosting the Time Card, and servers synchronized with the Time Card using such protocols as Precision Time Protocol (PTP) or Network Time Protocol (RFC Request for Comments) 5905). This standard also defines the basic building blocks of the Time Card and their interfaces in order to allow modularization. The main building blocks include time source, local oscillator, and time processor. Additionally, this standard defines interfaces between the Time Card and other systems. This includes physical interfaces that allow input and output of time-related signals. This also includes logical interfaces that are compatible with Portable Operating System Interface for UNIX (POSIX) and include for example an interface to share a Physical Hardware Clock (PHC). This allows sharing the time of day with other systems, as well as providing means for diagnostic and configuration. The definition of logical interfaces allows for a variety of Time Card's form factors (e.g. Peripheral Component Interconnect Express (PCIe)) while ensuring uniform support from the operating system. Any device that complies with this standard provides performance figures that are obtained following the specifications of this standard. As such, different implementations of the Time Card can be easily compared in terms of performance.
Derivative Hardware
[edit]The reference Time Card design (with an OCXO daughter card featureing the NEO-M9N RCB) is available for purchase fully programmed and assembled from Makerfabs[13] or fabricated and assembled from scratch using the publicly available source code, bill of materials, and Gerber files.
Several Time Card variants have been developed by other companies with different hardware yet compatible with the architecture and the driver of the Time Card:
- Safran ART2 (fully open sourced)
- Oscilloquartz OSA 5400 TimeCard™
References
[edit]- ↑ Time-Appliances-Project/Time-Card, Time Appliances Project, 2026-09-09, retrieved 2026-09-17
- ↑ "NVIDIA ConnectX®-6 Dx Dual-port 100GbE NIC and Time Card". Open Compute Project. Retrieved 2026-09-17.
- 1 2 3 "Open-sourcing a more precise time appliance". Engineering at Meta. 11 August 2021. Retrieved 10 January 2026.
- ↑ "Orolia and Meta collaborate on accurate and resilient timing network". Inside GNSS. 16 May 2022. Retrieved 10 January 2026.
- ↑ Byagowi, Ahmad; Meier, Sven; Schaub, Thomas; Sotiropoulos, Ioannis (October 2022). Time Card and Open Time Server. pp. 1–6. Bibcode:2022ispc.conf....1B. doi:10.1109/ISPCS55791.2022.9918379. ISBN 978-1-6654-7032-2. ISSN 1949-0313.
{{cite book}}:|journal=ignored (help) - ↑ "Meta to use time cards from Orolia to synchronize data centers". Data Center Dynamics. 26 April 2022. Retrieved 10 January 2026.
- ↑ "Time Cards with Atomic Clocks at OCP Regional Summit 2023 Prague". ServeTheHome. 14 July 2023. Retrieved 10 January 2026.
- ↑ Myrick, Wilbur; Shiga, Nobuyasu; James, Julian St.; Byagowi, Ahmad (September 2023). Exploring Wireless Clock Synchronization with OCP-TAP Time Cards and RTL-SDRS. pp. 1–5. Bibcode:2023ispc.conf...12M. doi:10.1109/ISPCS59528.2023.10296943. ISBN 979-8-3503-1358-1. ISSN 1949-0313.
{{cite book}}:|journal=ignored (help) - ↑ Myrick, Wilbur; Shiga, Nobuyasu; James, Julian St.; Byagowi, Ahmad (October 2024). Timing, Communications, and Ranging SDR (TCR-SDR) for IoT Wireless Synchronization. pp. 1–7. Bibcode:2024ispc.conf...13M. doi:10.1109/ISPCS63021.2024.10747731. ISBN 979-8-3503-6611-2. ISSN 1949-0313.
{{cite book}}:|journal=ignored (help) - ↑ Nguyen, Hoang Tung; Kovácsházy, Tamás (2025-05-19). Low-Cost PTP Grandmaster Clock Utilizing the Beaglebone Black Single Board Computer. IEEE. pp. 1–6. Bibcode:2025cmcy.conf.2840N. doi:10.1109/iccc65605.2025.11022840. ISBN 979-8-3315-0127-3.
{{cite book}}:|journal=ignored (help) - ↑ Kovácsházy, Tamás; Nguyen, Hoang Tung (2025-10-06). Improved Low-Cost PTP Grandmaster Clock Utilizing the Beaglebone Line of Single Board Computers. IEEE. pp. 1–7. Bibcode:2025ispc.conf.1692K. doi:10.1109/ispcs66324.2025.11281692. ISBN 978-1-6654-7750-5.
{{cite book}}:|journal=ignored (help) - ↑ Byagowi, Ahmad (2026-08-09), ahmadexp/IEEE-3335, retrieved 2026-09-17
- ↑ "OCP-TAP Time Card". www.makerfabs.com. Retrieved 2026-09-17.